1. Field of the Invention
The present invention relates to an image display apparatus of an active driving system and a method for driving the same. More specifically, the present invention relates to an image display apparatus where the scanning is effected by a field sequential scanning system and a method for driving the same.
2. Description of the Related Art
In recent years, brighter and higher quality image displays have been requested for various types of image display apparatuses such as a liquid crystal display (hereinafter, referred to as an LCD) apparatus. At the same time, with the increasing demand for portable information apparatuses, smaller and lighter image display apparatuses have been required.
Before describing conventional image display apparatuses, the terms "field" and "frame" as used herein are clarified as follows.
Frame: An image corresponding to the entire screen of an image display apparatus
Field: a component of the "frame"
In linear sequential scanning, display image data for one field is output by scanning a screen once from the top to the bottom thereof. One field period is defined as that period of time starting from when the scanning is initiated at the top end of the screen until the scanning returns to the top end again after the completion of the scanning at the bottom end of the screen. When interlaced scanning is used, one frame image is obtained by two fields. When non-interlaced scanning is used, one frame image is obtained by one field.
With the above definition, when an input interlaced signal is divided into three signals, red (R), green (G), and blue (B), and scannings are separately conducted for these signals sequentially, six fields are required to complete one frame image. Hereinafter, the field and the frame as used for normal TV signals of the NTSC system and the like are described. Such a field and a frame are hereinafter referred to as a TV field and a TV frame. When interlaced, one TV frame is obtained by two TV fields, completing one picture. One TV field is approximately 16.7 msec (60 Hz) in the case of an NTSC (M) signal, while it is 20 msec (50 Hz) in the case of a PAL.multidot.SECAM (B/G/D/K/I/L) signal.
A conventional active matrix LCD apparatus driven by the field sequential scanning system is shown in FIG. 23. This type of display apparatus is described, for example, in Japanese Laid-Open Patent Publication No. 64-5282. A display apparatus 18 shown in FIG. 23 is a color LCD apparatus. In the display apparatus 18, color video signals are supplied to data input terminals 10R, 10G, and 10B as red (R), green (G), and blue (B) image data, respectively. The display apparatus 18 includes A/D converters 20 for converting analog signals supplied as image data into digital signals, a memory 21 composed of a plurality of memory elements for storing data, a memory selection circuit 22, D/A converters 23 for converting the digital signals to analog signals for display, a data transfer circuit 24, a data scanning circuit 25, a control circuit 26 for controlling various circuits, and a pixel display portion 27. Two memory elements of the memory 21 are allocated for each color so as to complete a double frame memory for storing the image data of one frame and that of the next frame.
The A/D converters 20 and the D/A converters 23 are implemented by A/D conversion ICs (integrated circuits) and D/A conversion ICs, respectively. The memory 21 is implemented by memory elements such as DRAMs (Dynamic Random Access Memories), SRAMs (Static Random Access Memories), ROMs (Read Only Memories), and the like. Also, the data transfer circuit 24 and the data scanning circuit 25 are generally implemented by ICs called a source driver and a gate driver, respectively.
The display apparatus 18 effects color display by dividing the cycle of input image data (a vertical scanning period) into three equal portions. In other words, each of the R, G, and B signals stored in the memory 21 is selectively output from the memory selection circuit 22 one at a time at a cycle one-third that of the input image data. Therefore, the frequency of the signals for display is three times that of the input data signals.
FIG. 24 is an equivalent circuit of a pixel of the conventional display apparatus 18. The display apparatus 18 includes pixels arranged in a matrix, and signal lines 5 and scanning lines 6 for supplying data signals and scanning signals to the pixels, respectively. Each of the pixels includes a driving element (switching element) 3 composed of a thin film transistor (TFT), a liquid crystal (LC) capacitance 1 (capacitance value C.sub.p), and an auxiliary capacitance 8 (capacitance value C.sub.s). A signal line 5 is connected to one of electrodes of the LC capacitance 1 through drain/source terminals of the TFT 3, and a scanning line 6 is connected to a gate terminal of the TFT 3.
In such a pixel, the LC capacitance 1 is composed of two electrodes and liquid crystal sandwiched by the two electrodes. One of the electrodes (pixel electrode) is connected to the driving element 3, while the other electrode (common electrode) is connected to a common electric source line 7. The scanning line 6 is connected to the data scanning circuit 25 (see FIG. 23) which sequentially outputs scanning signals. The signal line 5 is connected to the data transfer circuit 24 (see FIG. 23) which transfers data signals. The data transfer circuit 24 outputs a display data signal to the signal line 5 for every scanning line or every pixel. When the scanning line 6 is made active, the TFT 3 is turned on, allowing a charge corresponding to the display data signal on the signal line 5 to be stored in the LC capacitance 1. The display is maintained by the voltage applied to the liquid crystal according to the charge stored in the LC capacitance 1.
The LC capacitance 1 is comparatively highly resistive, but, actually, it has a leakage resistance. Accordingly, the charge stored in the LC capacitance 1 leaks, and thus the voltage applied to the liquid crystal decreases before the driving element 3 is next turned on, resulting in the lowering of the quality of the display. In order to prevent the decrease of the applied voltage, the auxiliary capacitance 8 is disposed in parallel with the LC capacitance 1. Thus, the voltage applied to the liquid crystal is maintained by the LC capacitance 1 and the auxiliary capacitance 8.
The liquid crystal of the LC capacitance 1 sandwiched by the pixel electrode and the common electrode needs to be driven by an alternate voltage signal. A flicker may be generated by periodically inverting the polarity of the driving voltage to be applied to the liquid crystal. In order to prevent this flickering, 1H reverse driving is often used where the polarity of the driving voltage is reversed every scanning line. However the 1H reverse driving raises a problem as follows. Since a large voltage difference is produced between adjacent scanning lines, it is not possible to change the alignment of the liquid crystal molecules following the change in the voltage. This makes the boundaries of pixels between adjacent scanning lines unclear, thus losing the sharpness of the display. In order to solve this problem, a black matrix may be provided so as to be disposed between the scanning lines. This black matrix, however, lowers the numerical aperture of the LCD apparatus, thus darkening the resultant image displayed.
When a color image is displayed, a field sequential scanning system in which the scanning is conducted separately for each color is effective as one of the methods for solving the above problem. The field sequential scanning system is a coloring technique where two or more colors are displayed by temporal mixing. For example, Japanese Patent Application No. 3-77983 (Japanese Laid-Open Patent Publication No. 4-310925) filed by the same applicant as the present application, proposes two examples of driving methods adopting the field sequential scanning system. FIG. 25 shows one of the examples, where a driving circuit 28 for each pixel includes a buffer amplifying circuit 2 connected between a driving element 3 and an LC capacitance 1 and a holding capacitance 4 (capacitance value C.sub.H) connected in parallel between the buffer amplifying circuit 2 and the LC capacitance 1.
FIG. 26 is a timing chart showing an operation of the driving circuit 28. One TV field period is time-divided into three for R, G, and B colors. Data for display for each of the R, G, and B images is transferred to the pixel portion during a significantly short time .tau. in the 1/3 TV field period for each color. The display is conducted during the remaining display time TR, TG, or TB for each color. The buffer amplifying circuit 2 which has a high input impedance ensures that the transferred display data is held in the holding capacitance 4. This makes it possible for the LC capacitance 1 to maintain a charge until next display data is transferred (i.e., during the display time TR, TG, and TB).
FIG. 27 shows the sequential scanning of the first scanning line through the last n-th scanning line during the transfer time .tau., taking the display data for the R image as an example. As shown in FIG. 27, the ON time for each scanning line is .tau./n.
The other example of the above-described conventional technique is shown in FIG. 28, where a driving circuit 29 for each pixel includes another holding capacitance and two switches in addition to the driving circuit 28 described above. A common terminal of one switch SW1 is connected to a drain electrode of a driving element 3, while a common terminal of the other switch SW2 is connected to a gate of a buffer amplifying circuit 2 composed of a transistor. One of contacts of the switch SW1 is connected to one of the contacts of the switch SW2, while the other contact of the switch SW1 is connected to the other contact of the switch SW2. A holding capacitance 4a is formed between one connection of the switches SW1 and SW2 and a common signal line 7, while a holding capacitance 4b is formed between the other connection of the switches SW1 and SW2 and the common signal line 7. By switching the switches SW1 and SW2, a charge is stored in one of the holding capacitances 4a and 4b, while an image is displayed with a voltage obtained by a charge held in the other of the holding capacitances 4a and 4b.
With the above configuration, the transfer of display data to the holding capacitance and the writing of the display data to the LC capacitance 1 can be alternately conducted. FIG. 29 is a timing chart showing an operation of the driving circuit 29. As shown in FIG. 29, display data for colors are transferred (written) to the holding capacitances 4a and 4b alternately. Thus, display data for one color can be transferred, while the image display of another color is conducted. Accordingly, the transfer time .tau. of display data for each color can be extended to as long as the 1/3 TV field period. Also, the display of the R image, G image, and B image within one TV field period is possible.
In the above field sequential scanning system, when data is transferred to the pixel portion in a manner as shown in FIGS. 26 and 27, the data is sequentially written in all the pixels connected to the scanning lines during a time t. The time t is a period of time during which a display data signal is sufficiently written in the last row of pixels (the n-th scanning line) located farthest from the data transfer circuit 24 for applying a voltage required for the display to the LC capacitance 1. In this sequential scanning, the display time for the scanning lines located on the top portion of the screen is different from that for the scanning lines located on the bottom portion of the screen. Due to this difference in display time, troubles such as variation in luminance and flickering occur in the display apparatus 18. Further, since the effective display time as an image gradually decreases as the scanning proceeds to the lower scanning lines, the entire brightness of the screen gradually decreases. In the cases of the driving circuits 28 and 29 described above, the display time for each color is the same. Because the sense of eyesight is different for different colors, an image displayed on the screen with the same display time for the colors results in lacking natural color tone.
In general, in the above conventional display apparatus 18, the pixel display portion 27 only, or together with the data transfer circuit 24 and/or data scanning circuit 25 are formed on the same substrate, while other components are disposed as peripheral circuits. A monolithic structure will be described more concretely as follows.
In the case of an LCD apparatus using amorphous silicon TFTs, the driving element 3 and the auxiliary capacitance 8 are monolithically mounted on one substrate. The drivers and other circuits are formed as ICs on the periphery of the LCD apparatus, or housed in a control system separated from the LCD apparatus.
In the case of an LCD apparatus using poly-silicon TFTs, the data transfer circuit 24 and/or the data scanning circuit 25 may also be monolithically mounted on the substrate, as well as the driving element 3 and the auxiliary capacitance 8. This integration of the peripheral driving circuits is possible because polysilicon has a larger mobility compared with amorphous silicon. However, the D/A converters 23, the A/D converters 20, the memory 21, control circuits 26, and the like are formed as separate ICs on the periphery of the LCD apparatus or housed in a control device separated from the LCD apparatus.
The conventional display apparatus 18 with the above structure where individual ICs are connected to the LCD substrate has the following problems.
1) Unstable Circuit Operations Caused by Wirings Between IC and the LCD Substrate
When circuits having different potentials from one another are connected in a loop through an earth line, a signal line, a source line, and the like, oscillation may be generated in some cases. The time constant for the oscillation is determined by the capacitance value and the resistance value of the wiring, the circuit, and the like. When the time constant is in a predetermined range, oscillation occurs in the circuit. When oscillation occurs in the circuit, the IC malfunctions, failing to play its allocated function. The circuits shown in FIG. 23 include a number of loop wirings. Actually, there has arisen problems of lowering in stability caused by oscillation. Especially, wirings P.sub.1 connecting the data input terminals 10R, 10G, and 10B and the respective A/D converters 20 tend to be easily oscillated.
2) Generation of Noise
A long wiring acts as an antenna receiving electromagnetic waves propagating in a space and wave signal generated from another wiring. Such received wave signals may be added to a display signal on the wiring, resulting in generating a noise. The generation of noise is serious because it may cause troubles such as variation in the level of the signal to be supplied from the IC and malfunction of the IC. Referring to FIG. 23, especially liable to generate noise are the wirings P.sub.1 between the data input terminals 10R, 10G, and 10B and the respective A/D converters 20, wirings P.sub.3 between the D/A converters 23 and the data transfer circuit 24, and wirings P.sub.4 between the memory 21 and the memory selection circuit 22.
3) Signal Delay
Long wiring may cause a delay in the transmission of a signal due to the capacitance of the wiring itself and the contact capacitance at the contact between the wiring and the IC. Such a signal delay is more serious as the wiring is longer and more complicated. Because the contact capacitance between the wiring and the IC varies as the IC varies, the degree of the signal delay is different among wirings. This makes it difficult to equalize the degree of the signal delay or to compensate the signal delay. Especially, a signal delay in wiring connected to an IC which requires high-speed operation may cause a serious problem. Referring to FIG. 23, the signal delay generated in wirings P.sub.2 between the A/D converters 20 and the respective memory elements of the memory 21 may especially cause a problem.
4) Variation in IC Performance
The display apparatus 18 shown in FIG. 23 uses a number of ICs. The performance of these ICs varies among ICs, mainly because different production lots and wafers have different performances from each other. This variation in IC performance causes trouble as follows. When the levels of the conversion obtained by the D/A converters 23 are different from one another due to the variation in IC performance, the levels of converted data signals for display vary from one another. This results in the difference in luminance among the columns of pixels corresponding to the respective D/A converters 23, producing an image having vertical streaks with different luminance. Similar troubles arise in the ICs of the A/D converters 20, the data transfer circuit 24, the data scanning circuit 25, and the like. In order to solve these troubles, efforts have been made to equalize the performance of the ICs. In some cases, the ICs to be used have been specially selected. This variation in performance of the ICs is especially serious in the D/A converters 23 and the data transfer circuit 24.
5) High Cost and Many Manufacturing Steps
The conventional display apparatus having a number of ICs is expensive because costs for individual ICs, a print board on which the ICs are mounted, wiring, and the assembly of these components are required. Also, the conventional display apparatus requires a number of manufacturing steps because the steps of mounting, interconnecting, and assembling are required.
6) Large-scaled System
The pixel display portion substantially constructed of a pair of substrates can actually be made thinner and lighter. However, this advantage of the pixel display portion cannot be utilized because, with the peripheral circuits (print boards and ICs) added to the pixel display portion, the appearance of the entire LCD becomes large.
As described hereinbefore, the conventional display apparatus 18 realizes a color display by time-dividing the period of an image data signal input thereto into three. Accordingly, the frequency of the display signal output from the memory 21 is three times that of the input image data signal. Further, with the recent development of high-definition television sets (HDTV), it is more often required for the image display apparatus to respond to a signal of a higher frequency which is supplied from a high-frequency signal source. An LCD substrate made of polysilicon or single crystal silicon is limited in the response frequency. Accordingly, when the frequency of a signal processed by a circuit on the substrate exceeds the response frequency of the substrate, trouble arises. The signal is delayed because the response of the substrate fails in following the signal (the transmitting velocity of the signal is slow). The produced heat of the substrate increases, causing unfavorable influence to the operation of the IC and the optical properties of the liquid crystal.
In the case of the driving circuit 29 of which operation was described referring to FIG. 28, the transfer time of the image data signal was extended to as long as the 1/3 TV field period. However, the reduction of the signal processing speed (sampling speed) is insufficient.
The polarity of the display signal is inverted in order to prevent the degradation of the liquid crystal, as described above. Thus, in order to increase the response speed of the liquid crystal, it is necessary to increase the voltage to be applied to the liquid crystal. For this reason, the LCD substrate needs to have a sufficiently large withstand voltage. Increasing the withstand voltage of the substrate raises the following problems: (1) The response frequency of the substrate is lowered. Accordingly, the above-described troubles relating to the lowering of the response frequency occur more significantly. (2) The design rule of the system becomes large, so the thickness of the wirings and the size of various elements (transistors, capacitors, etc.) increase, making it difficult to make the entire display apparatus compact.